Ferad Zyulkyarov is born in Shumen, Bulgaria. He lived and studied in his hometown until 2001. In 2001, he graduated from one of the most prominent high schools in Bulgaria - School of Sciences and Mathematics Nancho Popovich. After high school, he went to Turkey for university studies. In 2006, he was the honored graduate of the department of Computer Engineering at the Dokuz Eylul Univerisity in Izmir. Just after completing his undergraduate, he enrolled in a PhD program in computer architecture at the department of Computer Architecture at the Technical University of Catalonia in Barcelona, Spain and joined Barcelona Supercomputing Center as a researcher. In 2008, he earned his master in computer architecture and is still pursuing his PhD and continues his work at BSC-MSRC. His current research is on Transactional Memory – including debugging and performance tools, compiler and runtime support, workloads and different micro-architectural implementations. His research and professional interests also include multiprocessor simulators, runtime and system programming.
Research Interests:
Debugging and performance tools for Transactional Memory, Runtime and compiler support for Transactional Memory, Workloads for Transactional Memory