Papers by BSC-MSRC

Circuit Design of a Dual-Versioning L1 Data Cache
Azam Seyedi
Adria Armejach
Adrián Cristal
Osman S. Unsal
Ibrahim Hur Mateo Valero
Integration, the VLSI Journal - Dec 2011
science.pdf
Rapid Development of Error-Free Architectural Simulators using Dynamic Runtime Testing
Saša Tomić
Adrián Cristal
Osman S. Unsal
Mateo Valero
23rd International Symposium on Computer Architecture and High Performance Computing - Oct 2011
FaulTM-multi: Fault Tolerance for Multithreaded Applications Running on Transactional Memory Hardware
Gulay Yalcin
Osman S. Unsal
Adrián Cristal
Mateo Valero
Workshop on Wild and Sane Ideas in Speculation and Transactions - Oct 2011
FIMSIM: A Fault Injection Infrastructure for Microarchitectural Simulators
Gulay Yalcin
Osman Unsal
Adrián Cristal
Mateo Valero
Proceedings of the 29th International Conference on Computer Design (ICCD) - Oct 2011
Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory
Adria Armejach
Azam Seyedi
Rubén Titos
Ibrahim Hur
Osman S. Unsal
Adrián Cristal
Mateo Valero
Proceedings of the 20th International Conference on Parallel Architectures and Compilation Techniques (PACT'2011) - Oct 2011
SymptomTM: Symptom Based Error Detection and Recovery Using Hardware Transactional Memory (poster)
Gulay Yalcin
Osman S. Unsal
Adrián Cristal
Ibrahim Hur
Mateo Valero
In 20th International Conference on Parallel Architectures and Compilation Techniques (PACT'2011) - Oct 2011
pid1999781.pdf
DiDi: Mitigating The Performance Impact of TLB Shootdowns Using A Shared TLB Directory
Carlos Villavieja
Vasileios Karakostas
Lluis Vilanova
Yoav Etsion
Alex Ramirez
Avi Mendelson
Nacho Navarro
Adrián Cristal
Osman Unsal
Proceedings of the 20th International Conference on Parallel Architectures and Compilation Techniques (PACT 2011) - Oct 2011
no files attached
STM2: A Parallel STM for High Performance Simultaneous Multithreading Systems
Gokcen Kestor
Roberto Gioiosa
Tim Harris
Osman S. Unsal
Adrián Cristal
Ibrahim Hur
Mateo Valero
Proceedings of the 20th International Conference on Parallel Architectures and Compilation Techniques (PACT'2011) - Oct 2011
pact11.pdf
Interchangeable Back Ends for STM Compilers
Gokcen Kestor
Luke Dalessandro
Adrián Cristal
Michael L. Scott and Osman S. Unsal
6th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT) - Jun 2011
transact11.pdf
A Comprehensive Study of Conflict Resolution Policies in Hardware Transactional Memory
Ege Akpinar
Saša Tomić
Adrián Cristal
Osman Unsal
Mateo Valero
6th ACM SIGPLAN Workshop on Transactional Computing (TRANSACT) - Jun 2011
Hybrid Transactional Memory with Pessimistic Concurrency Control
Enrique Vallejo
Sutirtha Sanyal
Tim Harris
Fernando Vallejo
Ramón Beivide
Osman Unsal
Adrián Cristal
Mateo Valero
International Journal of Parallel Programing, Vol. 39, Issue 3 - Jun 2011
no files attached
Circuit Design of a Dual-Versioning L1 Data Cache for Optimistic Concurrency (Best Paper Award)
Azam Seyedi
Adria Armejach
Adrián Cristal
Osman S. Unsal
Ibrahim Hur
Mateo Valero
In 21st Great Lakes Symposium on Very Large Scale Integration (GLSVLSI'11) - May 2011
glsvlsi11.pdf
TMbox: A Flexible and Reconfigurable 16-core Hybrid Transactional Memory System
Nehir Sonmez
Oriol Arcas
Otto Pflucker
Osman S. Unsal
Adrián Cristal
Ibrahim Hur
Satnam Singh
Mateo Valero
In 19th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2011) - May 2011
From Plasma to BeeFarm: Design Experience of an FPGA-based Multicore Prototype
Nehir Sonmez
Oriol Arcas
Gokhan Sayilar
Osman S. Unsal
Adrián Cristal
Ibrahim Hur
Satnam Singh
Mateo Valero
In 7th International Symposium on Applied Reconfigurable Computing (ARC 2011) - Mar 2011
beefarm.pdf
RMS-TM: A Comprehensive Benchmark Suite for Transactional Memory Systems (Best Paper Award)
Gokcen Kestor
Vasileios Karakostas
Osman Unsal
Adrián Cristal
Ibrahim Hur
Mateo Valero
2nd ACM/SPEC International Conference on Performance Engineering (ICPE 2011) - Mar 2011
icpe-11.pdf